FPGA Embedded Design/ Part 4 – Microprocessor Design
About Course
It’s time to take on a Challenge! How does designing a CPU sound?
In this fourth part of the FPGA Embedded Design series, we’ll design a CPU from scratch to finally get it up and running on several platforms.
We’ll write most of the code in the Vivado Design Suite, but you’ll have the chance to see it working as well in Quartus Prime, EDA Playground or LabsLand, so you can follow along with your favorite tools. The FPGA boards we’ll use are the BASYS3, by Digilent (with a Xilinx FPGA), and the DE0-CV from Terasic (with an Intel FPGA).
This course consists of three main parts:
- Foundations of Computer Architecture, where we’ll cover the essentials of CPU design and jargon.
- Design of our own CPU, where we’ll make several design decisions to come up with a soft processor that meets our needs.
- Hands-On Development, where we’ll write the code, simulate and finally get our CPU into an FPGA board. No purchases are required for this part, but it sure helps to have your own board to follow along, and keep on tinkering in the future with your new soft processor.
What are you waiting for? Let’s have fun designing a CPU!!!
Course Content
Introduction
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A Message from the Professor
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Introduction
03:22 -
Instructor Introduction
00:32 -
Motivation 1
00:42 -
Motivation 2
00:52 -
Motivation 3
00:54 -
Course Material Download Link
00:00
A Crash Course on Computer Architecture
Inside the CPU
Some Design Approaches
Let’s Design a CPU!
Instruction Set Design
Writing Our Own CPU RTL Code
Instruction Set Implementation
System Design
Synthesis and Simulation
Fun with EDA Playground
Target Hardware BASYS3 by Xilinx and Digilent
Target Hardware The DE0-CV Board, by Terasic and Intel
Fun with LabsLand
Wrap Up
Earn a certificate
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